Red Pitaya Notes               Peter Halverson Last update 3/13/2020

These are Halverson's personal notes. They are unedited and there is no guarantee of accuracy.  Use at your own risk. I am making them available to you because they might actually be helpful.  If they are helpful, I would really appreciate a "thank you". 

Link to latest notes on Google Docs:

SPECIFICATIONS  (Assuming I have a Red Pitaya STEMLAB 125-10)
FPGA= Xilinx Zynq 7010 SOC
RAM=  256MB (2Gb)
Disk= Micro SD up to 32GB

If the Red Pitaya has a static address, then connecting to it will look like this:
  To SSH to my device:  ssh root@     pw=root
  To open web page on device:

If the Red Pitaya has DHCP is running, then connecting to it will look like this:
  To SSH to my device: ssh root@rp-f000bd.local
  To open web page on device:  http://rp-f000bd.local/

Software in my device is currently version 0.90-149   (at least that's the version of the applications)
The version of Linux reported by uname -a is Linux redpitaya 3.9.0-xilinx #1 SMP PREEMPT Tue Feb 25 15:47:35 CET 2014 armv7l GNU/Linux

FPGA programming uses Xilinx Vivado 2017.2  (including SDK)
Red Pitaya uses Verilog and System Verilog

In the Developers guide, section the following statement is made:
  Red Pitaya is developed on Linux (64bit Ubuntu 16.04), so Linux is also the only platform we support.

 =============== HDL Notes  (HDL = Hardware Definition Language) ===============

Introduction to Verilog

.SV files contain System Verilog code.

.XDC files contain constraints in Xilinx Design Constraints format, used in Xilinx FPGA and SOC designs.  XDC is an offshoot from Synopsys Design Constraint (SDC) format, with Xilinx customized syntax.

The main difference between Verilog and VHDL is that Verilog is based on C language while VHDL is based on Ada and Pascal languages. Both Verilog and VHDL are Hardware Description Languages (HDL). ... VHDL is an older language whereas Verilog is the latest language.

Intro to TCL:

========================== Modelsim ============================
***** Learning environment for VHDL and Verilog:     (Free for students) ******
After putting in my info Mentor sends me an email with a unique download link.
In this case is was https:// Each time
(Each time I ask, the link has a different number.)
Download size 347 Mb.  Its name is modelsim-pe_student_edition.exe and it is a self-extracting zip file.
ModelSim PE Student Edition 10.4a Installed OK on Windows 7 virtual machine with 1 Gb ram.  The only issue was that the extraction failed due to "insufficient disk space" which was clearly wrong.  There was plenty of disk space. I downloaded a free program called 7ZIP and it extracted the installer OK.
On the Dell system, it extracted OK.  No need for 7zip.

Installation script runs and at the end it open Firefox (or whatever is default browser) and sends me to where it again asks me for my info.

After ~one hour, email arrives with student_license.dat (which is valid for only 180 days).  It needs to be put into the Midelsim directory, i.e. in C:\Modeltech_pe_edu_10.4a

9/30/2019  It works but complains about the license being invalid.  After messing around I delete (actually rename) this installation of Modelsim-PE and also the Modelsim-XE (from the Xilinx CD; it didn't work).  I go through the process of getting a new download of Modelsim-PE and a new license files and.... it works!!! Yay! Time to go to bed.

Important:  It seems the Mentor is tracking where the Modelsim download requests and the License requests are coming from.  So it seems I better do both from the device that will actually run Modelsim.

Comments from the license email:
A product tutorial, is available for download from the Mentor Graphics website at
You can also access the ModelSim PE Student Edition Google Group at!forum/modelsim-pe-student-edition

================ FPGA Learning Boards ============
Big list and advice:

Vary basic board:  Digilent 410-328

Much faster, capable board:  471-014 (Features same FPGA as Red Pitaya, Zynq-7000)

Also: 410-351-10

Recommended by Digilent:  410-183

Getting started tutorial:

================ Boards I inherited from JPL ===================

Xilinx CPLD Design Kit

Has two CPLDs  (Complex Programmable Logic Device).

1)   Xilinx  XC2C256-7TQG144C  CoolRunner-II
6000 gates ("High performance, low power")  3.3 V power for I/O and 1.8 V for internal logic (?)

2)  Xilinx  XC9572XL-10VQ44C

1600 gates.   3.3 V power

To program these, I want to use the old Window 7 PC and the old ISE 7.1i-Webpack software that comes with the board.  However the software is asking for a license number. To get the license number, I found this page for "legacy " licenses.

After putting in my personal info, I am granted access to this page;

It doesn't have the webpack licenses (Damn!)
Try again , this time starting here:

It takes me here, where node-locked licenses are "generated"

================ Tutorials by "nandland" =====================

NANDLAND tutorials are GREAT!!!!!   Highly recommended. The GoBoard is EASY to learn.

Get Modelsim here: